ETS25 Preliminary technical program

 

Tuesday, May 27

8.30 – 9.00

Opening session

 

9.00 – 9.45

Keynote talk #1

Tsung-Yung Jonathan Chang, “Semiconductors and Test in Artificial Intelligence Era”

 

9.45 – 10.30

Coffee-break and Scientific Posters session #1

 

10.30 – 12.00

Regular session #1 – Test and diagnosis

 

Paper #13        Identification of Failing Flip-Flops with Triangular Test Response Compaction, Jerzy TYSZER, Grzegorz MRUGALSKI, Janusz RAJSKI, Maciej TRAWKA

Paper #53        Automated Test Equipment Drift Characterization Based on Gauge Repeatability and Reproducibility,          
Anand VENKATACHALAM, Ernst ADERHOLZ, Matthias SAUER, Simon SCHWEIZER, Matthias WERNER, Ilia POLIAN

Paper #55        Automatic Test Pattern Generation for Printed Neuromorphic Circuits,       
Tara GHESHLAGHI, Priyanjana PAL, Alexander STUDT, Michael HEFENBROCK, Michael BEIGL, Mehdi TAHOORI

 

10.30 – 12.00

Special Session #1 – Dependable Neuromorphic Computing-in-Memory Architectures

Organizer: F. MERCHANT

Speakers: C. WENGER, M. GOMONY, S. KVATINSKY, V. RANA

 

 

12.00 – 13.15

Lunch

 

13.15 – 14.45

Regular session #2 – Reliability and AI

Paper #100      Non-Uniform Error Correction for Hyperdimensional Computing Edge Accelerators,
Mahboobe SADEGHIPOURRUDSARI, Surendra HEMARAM, Mehdi TAHOORI

Paper #22        An Integrated Framework for Aging Analysis Based on an Age-Aware Cell Library, Amirmahdi JOUDI, Negin SAFARI, Fatemeh MOHAMMADZADEH, katayoon BASHARKHAH, Fatemeh SHEIKH SHOAEI, Zainalabedin NAVABI

Paper #92        FastGDBN: A GPU-Accelerated DNN for Identifying Good Dies in Bad Neighborhoods,
Yu HENG TSAO, Yu Guang CHEN

 

13.15 – 14.45

Special session #2 - Printed and Flexible Electronics: From Design to Test

Organizer: M. TAHOORI

Speakers: M. TAHOORI, Emre OZER, G. ZERVAKIS

 

14.45 – 15.30

Coffee break, PhD forum and McCluskey contest posters

 

15.30 – 17.00

Regular session #3 – Security solutions

Paper #64        Early Result Capture: Racing Conditions in Pipeline due to Clock Glitches,
Roua BOULIFA, Giorgio DI NATALE, Paolo MAISTRI

Paper #2          Multi Coefficient CPA on a Black Box Hardware Implementation of CRYSTALS-Kyber,
Tarick WELLING, Maël GAY, Ilia POLIAN

Paper #41        Machine Learning-Assisted Side-Channel Analysis for Software Integrity Verification,        
Niklas LINDSKOG, Håkan ENGLUND, Jakob STERNBY, Elena DUBROVA

 

15.30 – 17.00

Special session #3

Good, Bad, & Ugly in Quantum Computing: Computational Power, Intrinsic Noise & Transient Faults,
O. Di Matteo, A. Vepsalainen, F. Mantegazzini, A. Cilardo

Organizers: P. RECH, E. GIUSTO

Speakers: O. DI MATTEO, A. VEPSALAINEN, F. MANTEGAZZINI, A. CILARDO

 

17.00 – 18.00

ETSteams Forum

 

18.00 – 19.30

Panel session #1 – 30th year ETS anniversary

Organizer: M. JENIHHIN

 

Wednesday, May 28

8.30 – 9.15

Keynote talk #2

Robert Wille, Fault-Tolerant Quantum Computing: Why the ETS Community Should Get Involved!

 

9.15 – 10.45

Regular session #4 – Fault attacks

Paper #67        BISSEL: Built-In Self Security via Embedded Sensors for Reproducible Side-Channel Leakage Assessment,
Md Toufiq Hasan ANIK, Hasin Ishraq REEFAT, Jean-Luc DANGER, Sylvain GUILLEY, Naghmeh KARIMI

Paper #68        FLARE: Fault Attack Leveraging Address Reconfiguration Exploits in Multi-Tenant FPGAs    ,
Jayeeta CHAUDHURI, Hassan NASSAR, Dennis GNAD, Jörg HENKEL, Mehdi TAHOORI, Krishnendu CHAKRABARTY

Paper #12        Securing Reconfigurable Scan Networks Against Data Sniffing and Data Alteration Attacks,
Joel ÅHLUND, Markus TöRMäNEN, Pamela SVENSSON, Mikael KERTTU, Torbjörn MåNEFJORD, Erik LARSSON

 

9.15 – 10.45

Special session #4 - Self-Aware Silicon: Enhancing Lifecycle Management with Intelligent Testing & Data Insights

F. Vargas, H. Amrouch, D. Tille

Orghanizer: S. HUHN

Speakers: F. VARGAS, H. AMROUCH, D. TILLE

 

10.45 – 11.00

Coffee break

 

11.00 – 12.30

Regular session #5 – Reliability and LLMs

Paper #52        LLM-aided Test Generation for Custom Neural Network Hardware Accelerators, Federico PECCIA, Tobias HALD, Oliver BRINGMANN

Paper #32        Confidence Driven Compact Testing of Compute-in-Memory Based Language Models,
Anurup SAHA, Chandramouli AMARNATH, Kwondo MA, Abhijit CHATTERJEE

Paper #40        On the Fault Sensitivity of Natural Language Embeddings Computation,
Sumeet SAPKAL, Ussama ZAHID, Giulio GAMBARDELLA, Haralampos STRATIGOPOULOS, Brian CLERKIN

 

11.00 – 12.30

Special session #5 - On the dependability of emerging neuromorphic accelerators for SNNs

Organizers: A. GEBREGIORGIS, T. SPYROU

Speakers: H. STRATIGOPOULOS, I. ALOUANI

 

12.30 – 14.00

Lunch

 

14.00 – 15.30

Panel session #2 - Chips Act in EU: where are we standing and what is next?

Organizer: S. HAMDIOUI

16.00 – 22.00

Social event

 

 

Thursday, May 29

8.30 – 9.15

Keynote talk #3

Sreejit Chakravarty, Rethinking Manufacturing Testing to address Silent Data Errors

 

9.15 – 10.15

Regular session #6 – RRAM testing

Paper #44        Structural Testing of a RRAM-based AI Accelerator Core,
Emmanouil Anastasios SERLIS, Hanzhi XUN, Mottaqiallah TAOUIL, Said HAMDIOUI, Moritz FIEBACK

Paper #83        In-Field Monitoring and Preventing Read Disturb Faults in RRAMs,
Hanzhi XUN, Moritz FIEBACK, Sicong YUAN, Changhao WANG, Erbing HUA, Leticia BOLZANI POEHLS, Hassen AZIZA, Riccardo CANTORO, Mottaqiallah TAOUIL, Said HAMDIOUI

 

9.15 – 10.15

Embedded tutorial #1 - Physical Unclonable Functions (PUFs): Foundations, Evaluation, and Testing for Secure Hardware Systems

Elena Ioana Vatajelu, Giorgio Di Natale

 

9.15 – 10.15

Embedded tutorial #2 - Opportunities and Challenges in AI Computing with Chiplet Architectures: Integrating CMOS and Emerging Technologies for Future Innovations

Leticia Maria Bolzani Poehls, Hussam Amrouch

 

10.15 – 11.00

Coffee-break and Scientific Posters session #2

 

11.00 – 12.30

Regular session #7 - DfT and BIST solutions

Paper #25        Design-for-Test and Calibration for Silicon Photonics using Ring Resonators and Wavelength Division Multiplexing,
Pratishtha AGNIHOTRI, Lawrence SCHLITT, Priyank KALLA, Steve BLAIR

Paper #59        A Novel BIST Method for Multi-Port Register Files,
Andy CHEN, Vianney CHOSEROT, Munish KUMAR, Khushal GELDA, Shreyas DIXIT, Wei ZOU, Jongsin YUN, Harshitha KODALI, Albert AU, Lori SCHRAMM, Martin KEIM

Paper #72        MBIST-guided Reliability Improvement Scheme for SRAM-based Computation in Memory,
Sina BAKHTAVARI MAMAGHANI, Jongsin YUN, Martin KEIM, Mehdi TAHOORI

 

11.00 – 12.30

Special session #6 - Large Language Models for Verification, Testing and Design

Organizer: C. KUMAR JHA

Speakers: B. LI, S. GARG

 

12.30 – 14.00

Lunch

 

14.00 – 15.30

Regular session #8 - Advances on Chiplet testing and AI Accelerators

Paper #39        Extendable E2I-TEST for Chiplet-based Inter-die Interconnects,
Po-Yao CHUANG, Erik Jan MARINISSEN

Paper #74        DFT Techniques For Efficient 3D IC Interconnect Test For Chiplet and Multi-Die Package,
Anshuman CHANDRA, Chi-Chun YANG, Quoc PHAN, Martin KEIM

Paper #9          Security Risks in AI Accelerators: Detecting RTL Vulnerabilities to Model Theft with Formal Verification,
Mohamed SHELKAMY ALI, Lucas DEUTSCHMANN, Johannes MüLLER, Anna Lena DUQUE ANTóN, Mohammad R. FADIHEH, Dominik STOFFEL, Wolfgang KUNZ

 

15.30 – 16

Closing session